1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2009 4 * Vipin Kumar, STMicroelectronics, <vipin.kumar@st.com> 5 */ 6 7 #ifndef _SPEAR_COMMON_H 8 #define _SPEAR_COMMON_H 9 /* 10 * Common configurations used for both spear3xx as well as spear6xx 11 */ 12 13 /* U-Boot Load Address */ 14 15 /* Ethernet driver configuration */ 16 #define CONFIG_PHY_RESET_DELAY 10000 /* in usec */ 17 18 /* USBD driver configuration */ 19 #if defined(CONFIG_SPEAR_USBTTY) 20 #define CONFIG_DW_UDC 21 #define CONFIG_USB_DEVICE 22 #define CONFIG_USBD_HS 23 #define CONFIG_USB_TTY 24 25 #define CONFIG_USBD_PRODUCT_NAME "SPEAr SoC" 26 #define CONFIG_USBD_MANUFACTURER "ST Microelectronics" 27 28 #endif 29 30 #define CONFIG_EXTRA_ENV_USBTTY "usbtty=cdc_acm\0" 31 32 /* I2C driver configuration */ 33 #define CONFIG_SYS_I2C 34 #if defined(CONFIG_SPEAR600) 35 #define CONFIG_SYS_I2C_BASE 0xD0200000 36 #elif defined(CONFIG_SPEAR300) 37 #define CONFIG_SYS_I2C_BASE 0xD0180000 38 #elif defined(CONFIG_SPEAR310) 39 #define CONFIG_SYS_I2C_BASE 0xD0180000 40 #elif defined(CONFIG_SPEAR320) 41 #define CONFIG_SYS_I2C_BASE 0xD0180000 42 #endif 43 #define CONFIG_SYS_I2C_SPEED 400000 44 #define CONFIG_SYS_I2C_SLAVE 0x02 45 46 #define CONFIG_I2C_CHIPADDRESS 0x50 47 48 /* Timer, HZ specific defines */ 49 50 /* Flash configuration */ 51 #if defined(CONFIG_FLASH_PNOR) 52 #define CONFIG_SPEAR_EMI 53 #else 54 #define CONFIG_ST_SMI 55 #endif 56 57 #if defined(CONFIG_ST_SMI) 58 59 #define CONFIG_SYS_MAX_FLASH_BANKS 2 60 #define CONFIG_SYS_FLASH_BASE 0xF8000000 61 #define CONFIG_SYS_CS1_FLASH_BASE 0xF9000000 62 #define CONFIG_SYS_FLASH_BANK_SIZE 0x01000000 63 #define CONFIG_SYS_FLASH_ADDR_BASE {CONFIG_SYS_FLASH_BASE, \ 64 CONFIG_SYS_CS1_FLASH_BASE} 65 #define CONFIG_SYS_MAX_FLASH_SECT 128 66 67 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * CONFIG_SYS_HZ) 68 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * CONFIG_SYS_HZ) 69 70 #endif 71 72 /* 73 * Serial Configuration (PL011) 74 * CONFIG_PL01x_PORTS is defined in specific files 75 */ 76 #define CONFIG_PL011_CLOCK (48 * 1000 * 1000) 77 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, \ 78 57600, 115200 } 79 80 #define CONFIG_SYS_LOADS_BAUD_CHANGE 81 82 /* NAND FLASH Configuration */ 83 #define CONFIG_SYS_NAND_SELF_INIT 84 #define CONFIG_NAND_FSMC 85 #define CONFIG_SYS_MAX_NAND_DEVICE 1 86 #define CONFIG_SYS_NAND_ONFI_DETECTION 87 88 /* 89 * Default Environment Varible definitions 90 */ 91 92 /* 93 * U-Boot Environment placing definitions. 94 */ 95 #if defined(CONFIG_ENV_IS_IN_FLASH) 96 #ifdef CONFIG_ST_SMI 97 /* 98 * Environment is in serial NOR flash 99 */ 100 #define CONFIG_SYS_MONITOR_LEN 0x00040000 101 #define CONFIG_FSMTDBLK "/dev/mtdblock3 " 102 103 #define CONFIG_BOOTCOMMAND "bootm 0xf8050000" 104 105 #elif defined(CONFIG_SPEAR_EMI) 106 /* 107 * Environment is in parallel NOR flash 108 */ 109 #define CONFIG_SYS_MONITOR_LEN 0x00060000 110 #define CONFIG_FSMTDBLK "/dev/mtdblock3 " 111 112 #define CONFIG_BOOTCOMMAND "cp.b 0x50080000 0x1600000 " \ 113 "0x4C0000; bootm 0x1600000" 114 #endif 115 #elif defined(CONFIG_ENV_IS_IN_NAND) 116 /* 117 * Environment is in NAND 118 */ 119 120 #define CONFIG_ENV_RANGE 0x10000 121 #define CONFIG_FSMTDBLK "/dev/mtdblock7 " 122 123 #define CONFIG_BOOTCOMMAND "nand read.jffs2 0x1600000 " \ 124 "0x80000 0x4C0000; " \ 125 "bootm 0x1600000" 126 #endif 127 128 #define CONFIG_NFSBOOTCOMMAND \ 129 "bootp; " \ 130 "setenv bootargs root=/dev/nfs rw " \ 131 "nfsroot=$(serverip):$(rootpath) " \ 132 "ip=$(ipaddr):$(serverip):$(gatewayip):" \ 133 "$(netmask):$(hostname):$(netdev):off " \ 134 "console=ttyAMA0,115200 $(othbootargs);" \ 135 "bootm; " 136 137 #define CONFIG_RAMBOOTCOMMAND \ 138 "setenv bootargs root=/dev/ram rw " \ 139 "console=ttyAMA0,115200 $(othbootargs);" \ 140 CONFIG_BOOTCOMMAND 141 142 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 143 144 /* Miscellaneous configurable options */ 145 #define CONFIG_BOOT_PARAMS_ADDR 0x00000100 146 #define CONFIG_CMDLINE_TAG 147 #define CONFIG_SETUP_MEMORY_TAGS 148 149 #define CONFIG_SYS_MALLOC_LEN (1024*1024) 150 #define CONFIG_SYS_LOAD_ADDR 0x00800000 151 152 #define CONFIG_SYS_FLASH_EMPTY_INFO 153 154 /* Physical Memory Map */ 155 #define PHYS_SDRAM_1 0x00000000 156 #define PHYS_SDRAM_1_MAXSIZE 0x40000000 157 158 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 159 #define CONFIG_SYS_INIT_RAM_ADDR 0xD2800000 160 #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 161 162 #define CONFIG_SYS_INIT_SP_OFFSET \ 163 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 164 165 #define CONFIG_SYS_INIT_SP_ADDR \ 166 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 167 168 #endif 169