1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2013-2015 4 * NVIDIA Corporation <www.nvidia.com> 5 */ 6 7 #ifndef _TEGRA210_COMMON_H_ 8 #define _TEGRA210_COMMON_H_ 9 10 #include "tegra-common.h" 11 12 /* 13 * NS16550 Configuration 14 */ 15 #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */ 16 17 /* Generic Interrupt Controller */ 18 #define CONFIG_GICV2 19 20 /* 21 * Memory layout for where various images get loaded by boot scripts: 22 * 23 * scriptaddr can be pretty much anywhere that doesn't conflict with something 24 * else. Put it above BOOTMAPSZ to eliminate conflicts. 25 * 26 * pxefile_addr_r can be pretty much anywhere that doesn't conflict with 27 * something else. Put it above BOOTMAPSZ to eliminate conflicts. 28 * 29 * kernel_addr_r must be within the first 128M of RAM in order for the 30 * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will 31 * decompress itself to 0x8000 after the start of RAM, kernel_addr_r 32 * should not overlap that area, or the kernel will have to copy itself 33 * somewhere else before decompression. Similarly, the address of any other 34 * data passed to the kernel shouldn't overlap the start of RAM. Pushing 35 * this up to 16M allows for a sizable kernel to be decompressed below the 36 * compressed load address. 37 * 38 * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for 39 * the compressed kernel to be up to 16M too. 40 * 41 * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows 42 * for the FDT/DTB to be up to 1M, which is hopefully plenty. 43 */ 44 #define CONFIG_LOADADDR 0x80080000 45 #define MEM_LAYOUT_ENV_SETTINGS \ 46 "scriptaddr=0x90000000\0" \ 47 "pxefile_addr_r=0x90100000\0" \ 48 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \ 49 "fdtfile=" FDTFILE "\0" \ 50 "fdt_addr_r=0x83000000\0" \ 51 "ramdisk_addr_r=0x83200000\0" 52 53 /* For USB EHCI controller */ 54 #define CONFIG_EHCI_IS_TDI 55 #define CONFIG_USB_EHCI_TXFIFO_THRESH 0x10 56 57 /* GPU needs setup */ 58 #define CONFIG_TEGRA_GPU 59 60 #endif /* _TEGRA210_COMMON_H_ */ 61