1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ 2 /* 3 * Copyright (c) 2018 Microsemi Corporation 4 */ 5 6 #ifndef __VCOREIII_H 7 #define __VCOREIII_H 8 9 #include <linux/sizes.h> 10 11 /* Onboard devices */ 12 13 #define CONFIG_SYS_MALLOC_LEN 0x1F0000 14 #define CONFIG_SYS_LOAD_ADDR 0x00100000 15 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 16 17 #if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL) 18 #define CPU_CLOCK_RATE 416666666 /* Clock for the MIPS core */ 19 #define CONFIG_SYS_MIPS_TIMER_FREQ 208333333 20 #else 21 #define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */ 22 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2) 23 #endif 24 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ 25 26 #define CONFIG_SYS_SDRAM_BASE 0x80000000 27 #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ) 28 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 29 #elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT) 30 #define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M) 31 #elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16) 32 #define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M) 33 #else 34 #error Unknown DDR size - please add! 35 #endif 36 37 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 38 39 #if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT) 40 #define VCOREIII_DEFAULT_MTD_ENV \ 41 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \ 42 "mtdids="CONFIG_MTDIDS_DEFAULT"\0" 43 #else 44 #define VCOREIII_DEFAULT_MTD_ENV /* Go away */ 45 #endif 46 47 #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ 48 49 #define CONFIG_EXTRA_ENV_SETTINGS \ 50 VCOREIII_DEFAULT_MTD_ENV \ 51 "loadaddr=0x81000000\0" \ 52 "spi_image_off=0x00100000\0" \ 53 "console=ttyS0,115200\0" \ 54 "setup=setenv bootargs console=${console} ${mtdparts}" \ 55 "${bootargs_extra}\0" \ 56 "spiboot=run setup; sf probe; sf read ${loadaddr}" \ 57 "${spi_image_off} 0x600000; bootm ${loadaddr}\0" \ 58 "ubootfile=u-boot.bin\0" \ 59 "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};" \ 60 "sf erase UBoot 0x100000;" \ 61 "sf write ${loadaddr} UBoot ${filesize}\0" \ 62 "bootcmd=run spiboot\0" \ 63 "" 64 #endif /* __VCOREIII_H */ 65