1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Configuation settings for the WB45N CPU Module. 4 */ 5 6 #ifndef __CONFIG_H__ 7 #define __CONFIG_H__ 8 9 #include <asm/hardware.h> 10 #include <linux/stringify.h> 11 12 /* ARM asynchronous clock */ 13 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 14 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ 15 16 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 17 #define CONFIG_SETUP_MEMORY_TAGS 18 #define CONFIG_INITRD_TAG 19 #define CONFIG_SKIP_LOWLEVEL_INIT 20 21 /* general purpose I/O */ 22 #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 23 24 /* serial console */ 25 #define CONFIG_USART_BASE ATMEL_BASE_DBGU 26 #define CONFIG_USART_ID ATMEL_ID_SYS 27 28 /* 29 * BOOTP options 30 */ 31 #define CONFIG_BOOTP_BOOTFILESIZE 32 33 /* SDRAM */ 34 #define CONFIG_SYS_SDRAM_BASE 0x20000000 35 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */ 36 37 #define CONFIG_SYS_INIT_SP_ADDR \ 38 (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 39 40 /* NAND flash */ 41 #define CONFIG_SYS_MAX_NAND_DEVICE 1 42 #define CONFIG_SYS_NAND_BASE 0x40000000 43 /* our ALE is AD21 */ 44 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 45 /* our CLE is AD22 */ 46 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 47 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4 48 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5 49 50 #define CONFIG_RBTREE 51 52 /* Ethernet */ 53 #define CONFIG_MACB 54 #define CONFIG_RMII 55 #define CONFIG_NET_RETRY_COUNT 20 56 #define CONFIG_MACB_SEARCH_PHY 57 #define CONFIG_ETHADDR C0:EE:40:00:00:00 58 59 /* System */ 60 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 61 62 #ifdef CONFIG_SYS_USE_NANDFLASH 63 /* bootstrap + u-boot + env + linux in nandflash */ 64 65 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \ 66 "run _mtd; bootm" 67 68 #define MTDIDS_DEFAULT "nand0=atmel_nand" 69 #define MTDPARTS_DEFAULT "mtdparts=atmel_nand:" \ 70 "128K(at91bs)," \ 71 "512K(u-boot)," \ 72 "128K(u-boot-env)," \ 73 "128K(redund-env)," \ 74 "2560K(kernel-a)," \ 75 "2560K(kernel-b)," \ 76 "38912K(rootfs-a)," \ 77 "38912K(rootfs-b)," \ 78 "46208K(user)," \ 79 "512K(logs)" 80 81 #else 82 #error No boot method selected, please select 'CONFIG_SYS_USE_NANDFLASH' 83 #endif 84 85 #define CONFIG_EXTRA_ENV_SETTINGS \ 86 "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \ 87 "autoload=no\0" \ 88 "autostart=no\0" \ 89 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0" \ 90 "\0" 91 92 #define CONFIG_SYS_CBSIZE 256 93 #define CONFIG_SYS_MAXARGS 16 94 95 /* 96 * Size of malloc() pool 97 */ 98 #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) 99 100 /* SPL */ 101 #define CONFIG_SPL_MAX_SIZE 0x6000 102 #define CONFIG_SPL_STACK 0x308000 103 104 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 105 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 106 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 107 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 108 109 #define CONFIG_SYS_MONITOR_LEN (512 << 10) 110 111 #define CONFIG_SYS_MASTER_CLOCK 132096000 112 #define CONFIG_SYS_AT91_PLLA 0x20c73f03 113 #define CONFIG_SYS_MCKR 0x1301 114 #define CONFIG_SYS_MCKR_CSS 0x1302 115 116 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 117 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 118 #define CONFIG_SYS_NAND_PAGE_SIZE 0x800 119 #define CONFIG_SYS_NAND_PAGE_COUNT 64 120 #define CONFIG_SYS_NAND_OOBSIZE 64 121 #define CONFIG_SYS_NAND_BLOCK_SIZE 0x20000 122 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0x0 123 124 #endif /* __CONFIG_H__ */ 125