1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Based on the linux multiplexer framework
4 *
5 * Copyright (C) 2017 Axentia Technologies AB
6 * Author: Peter Rosin <peda@axentia.se>
7 *
8 * Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
9 * Jean-Jacques Hiblot <jjhiblot@ti.com>
10 */
11
12 #ifndef _MUX_INTERNAL_H
13 #define _MUX_INTERNAL_H
14
15 /* See mux.h for background documentation. */
16
17 struct ofnode_phandle_args;
18
19 /**
20 * struct mux_chip - Represents a chip holding mux controllers.
21 * @controllers: Number of mux controllers handled by the chip.
22 * @mux: Array of mux controllers that are handled.
23 *
24 * This a per-device uclass-private data.
25 */
26 struct mux_chip {
27 unsigned int controllers;
28 struct mux_control *mux;
29 };
30
31 /**
32 * struct mux_control_ops - Mux controller operations for a mux chip.
33 * @set: Set the state of the given mux controller.
34 */
35 struct mux_control_ops {
36 /**
37 * set - Apply a state to a multiplexer control
38 *
39 * @mux: A multiplexer control
40 * @return 0 if OK, or a negative error code.
41 */
42 int (*set)(struct mux_control *mux, int state);
43
44 /**
45 * of_xlate - Translate a client's device-tree (OF) multiplexer
46 * specifier.
47 *
48 * If this function pointer is set to NULL, the multiplexer core will
49 * use a default implementation, which assumes #mux-control-cells = <1>
50 * and that the DT cell contains a simple integer channel ID.
51 *
52 * @dev_mux: The multiplexer device. A single device may handle
53 * several multiplexer controls.
54 * @args: The multiplexer specifier values from device tree.
55 * @muxp: (out) A multiplexer control
56 * @return 0 if OK, or a negative error code.
57 */
58 int (*of_xlate)(struct mux_chip *dev_mux,
59 struct ofnode_phandle_args *args,
60 struct mux_control **muxp);
61 };
62
63 /**
64 * struct mux_control - Represents a mux controller.
65 * @in_use: Whether the mux controller is in use or not.
66 * @dev: The client device.
67 * @cached_state: The current mux controller state, or -1 if none.
68 * @states: The number of mux controller states.
69 * @idle_state: The mux controller state to use when inactive, or one
70 * of MUX_IDLE_AS_IS and MUX_IDLE_DISCONNECT.
71 * @id: The index of the mux controller within the mux chip
72 * it is a part of.
73 *
74 * Mux drivers may only change @states and @idle_state, and may only do so
75 * between allocation and registration of the mux controller. Specifically,
76 * @cached_state is internal to the mux core and should never be written by
77 * mux drivers.
78 */
79 struct mux_control {
80 bool in_use;
81 struct udevice *dev;
82 int cached_state;
83 unsigned int states;
84 int idle_state;
85 int id;
86 };
87
88 /**
89 * mux_control_get_index() - Get the index of the given mux controller
90 * @mux: The mux-control to get the index for.
91 *
92 * Return: The index of the mux controller within the mux chip the mux
93 * controller is a part of.
94 */
mux_control_get_index(struct mux_control * mux)95 static inline unsigned int mux_control_get_index(struct mux_control *mux)
96 {
97 return mux->id;
98 }
99
100 /**
101 * mux_alloc_controllers() - Allocate the given number of mux controllers.
102 * @dev: The client device.
103 * controllers: Number of controllers to allocate.
104 *
105 * Return: 0 of OK, -errno otherwise.
106 */
107 int mux_alloc_controllers(struct udevice *dev, unsigned int controllers);
108
109 #endif
110