1 /*
2  * Xen emulation for hpet
3  *
4  * Copyright (C) 2014 Verizon Corporation
5  *
6  * This file is free software; you can redistribute it and/or modify it
7  * under the terms of the GNU General Public License Version 2 (GPLv2)
8  * as published by the Free Software Foundation.
9  *
10  * This file is distributed in the hope that it will be useful,
11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13  * General Public License for more details. <http://www.gnu.org/licenses/>.
14  */
15 
16 #include <stdio.h>
17 #include <stdlib.h>
18 #include <stdint.h>
19 #include <inttypes.h>
20 #include <string.h>
21 
22 #define PCI_HAVE_64BIT_ADDRESS
23 #include <pci/types.h>
24 
25 #include "hpet.h"
26 
27 #include <xen-tools/libs.h>
28 
29 #define NR_CPUS 8
30 
31 typedef int64_t s_time_t;
32 typedef int spinlock_t;
33 typedef int bool_t;
34 
35 #define BITS_PER_LONG __WORDSIZE
36 #define BITS_TO_LONGS(bits) \
37     (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG)
38 #define DECLARE_BITMAP(name, bits) \
39     unsigned long name[BITS_TO_LONGS(bits)]
40 typedef struct cpumask
41 {
42     DECLARE_BITMAP(bits, NR_CPUS);
43 } cpumask_t;
44 typedef cpumask_t *cpumask_var_t;
45 struct msi_desc
46 {
47     struct msi_attrib
48     {
49         u8    type    : 5;    /* {0: unused, 5h:MSI, 11h:MSI-X} */
50         u8    maskbit : 1;    /* mask-pending bit supported ?   */
51         u8    masked  : 1;
52         u8    is_64   : 1;    /* Address size: 0=32bit 1=64bit  */
53         u8    pos;            /* Location of the msi capability */
54         u16   entry_nr;       /* specific enabled entry         */
55     } msi_attrib;
56 };
57 
58 struct msi_msg
59 {
60     u32     address_lo;     /* low 32 bits of msi message address */
61     u32     address_hi;     /* high 32 bits of msi message address */
62     u32     data;           /* 16 bits of msi message data */
63     u32     dest32;         /* used when Interrupt Remapping with EIM is enabled */
64 };
65 
66 #define X86EMUL_OKAY 100
67 #define EINVAL 101
68 
69 #define DBG_LEVEL_PIT 200
70 
71 #define TRC_HW_VCHIP_HPET_START_TIMER 300
72 #define TRC_HW_VCHIP_HPET_STOP_TIMER 301
73 #define TRC_HW_VCHIP_PIT_STOP_TIMER 302
74 
75 #define TRC_HVM_VCHIP_HPET_START_TIMER 400
76 #define TRC_HVM_VCHIP_HPET_STOP_TIMER 401
77 #define TRC_HVM_VCHIP_PIT_STOP_TIMER 402
78 
79 #define TRC_HVM_EMUL_HPET_START_TIMER 400
80 #define TRC_HVM_EMUL_HPET_STOP_TIMER 401
81 #define TRC_HVM_EMUL_PIT_STOP_TIMER 402
82 
83 #define __read_mostly
84 #define __initdata
85 #define __init
86 #define __maybe_unused
87 #define __cacheline_aligned
88 #define boolean_param(a, b)
89 #define fix_to_virt(a) a
90 #define xmalloc_array(_type, _num) (void *)(_type)(_num)
91 #define DEFINE_PER_CPU(_type, _name) _type _name
92 
93 #define KERN_DEBUG
94 #define KERN_INFO
95 
96 #define XENLOG_WARNING
97 #define XENLOG_INFO
98 #define XENLOG_ERR
99 #define XENLOG_GUEST
100 
101 #define MSI_TYPE_UNKNOWN 0
102 #define MSI_TYPE_HPET    1
103 #define MSI_TYPE_IOMMU   2
104 
105 #define STIME_MAX ((s_time_t)((uint64_t)~0ull>>1))
106 
107 /* Low-latency softirqs come first in the following list. */
108 enum
109 {
110     TIMER_SOFTIRQ = 0,
111     SCHEDULE_SOFTIRQ,
112     NEW_TLBFLUSH_CLOCK_PERIOD_SOFTIRQ,
113     RCU_SOFTIRQ,
114     TASKLET_SOFTIRQ,
115     NR_COMMON_SOFTIRQS
116 };
117 /*
118  * ..and if you can't take the strict
119  * types, you can specify one yourself.
120  *
121  * Or not use min/max at all, of course.
122  */
123 #define min_t(type, x, y) \
124     ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
125 #define max_t(type, x, y) \
126     ({ type __x = (x); type __y = (y); __x > __y ? __x : __y; })
127 #define offsetof(t, m) ((unsigned long )&((t *)0)->m)
128 #define container_of(ptr, type, member) ({              \
129         typeof( ((type *)0)->member ) *__mptr = (ptr);  \
130         (type *)( (char *)__mptr - offsetof(type,member) ); })
131 
132 struct domain;
133 
134 struct vcpu
135 {
136     int vcpu_id;
137     struct domain *domain;
138 };
139 
140 typedef void time_cb(struct vcpu *v, void *opaque);
141 
142 struct periodic_time
143 {
144 #define PTSRC_isa    1 /* ISA time source */
145 #define PTSRC_lapic  2 /* LAPIC time source */
146     u8 source;                  /* PTSRC_ */
147 };
148 
149 void destroy_periodic_time(struct periodic_time *pt);
150 void create_periodic_time(
151     struct vcpu *v, struct periodic_time *pt, uint64_t delta,
152     uint64_t period, uint8_t irq, time_cb *cb, void *data);
153 
154 #define HPET_TIMER_NUM 3
155 
156 struct hpet_registers
157 {
158     /* Memory-mapped, software visible registers */
159     uint64_t capability;        /* capabilities */
160     uint64_t config;            /* configuration */
161     uint64_t isr;               /* interrupt status reg */
162     uint64_t mc64;              /* main counter */
163     struct                      /* timers */
164     {
165         uint64_t config;        /* configuration/cap */
166         uint64_t cmp;           /* comparator */
167         uint64_t fsb;           /* FSB route, not supported now */
168     } timers[HPET_TIMER_NUM];
169 
170     /* Hidden register state */
171     uint64_t period[HPET_TIMER_NUM]; /* Last value written to comparator */
172     uint64_t comparator64[HPET_TIMER_NUM]; /* 64 bit running comparator */
173     uint64_t offset64[HPET_TIMER_NUM]; /* offset so comparator calc "works" */
174     uint64_t first_mc64[HPET_TIMER_NUM]; /* 1st interval main counter */
175     bool_t first_enabled[HPET_TIMER_NUM]; /* In 1st interval */
176 };
177 
178 typedef struct HPETState
179 {
180     struct hpet_registers hpet;
181     uint64_t stime_freq;
182     uint64_t hpet_to_ns_scale; /* hpet ticks to ns (multiplied by 2^10) */
183     uint64_t hpet_to_ns_limit; /* max hpet ticks convertable to ns      */
184     uint64_t mc_offset;
185     struct periodic_time pt[HPET_TIMER_NUM];
186     spinlock_t lock;
187 } HPETState;
188 
189 typedef struct PITState
190 {
191     struct periodic_time pt0;
192     spinlock_t lock;
193 } PITState;
194 
195 
196 struct pl_time      /* platform time */
197 {
198     struct HPETState vhpet;
199     /* guest_time = Xen sys time + stime_offset */
200     int64_t stime_offset;
201     /* Ensures monotonicity in appropriate timer modes. */
202     uint64_t last_guest_time;
203     spinlock_t pl_time_lock;
204 };
205 
206 #define HVM_PARAM_HPET_ENABLED 11
207 
208 struct hvm_domain
209 {
210     struct pl_time         pl_time;
211     long params[20];
212 };
213 
214 struct arch_domain
215 {
216     struct hvm_domain hvm_domain;
217     struct PITState vpit;
218 };
219 
220 struct domain
221 {
222     int domain_id;
223     struct arch_domain arch;
224     struct vcpu *vcpu[NR_CPUS];
225 };
226 
227 typedef int (*hvm_mmio_read_t)(struct vcpu *v,
228                                unsigned long addr,
229                                unsigned long length,
230                                unsigned long *val);
231 typedef int (*hvm_mmio_write_t)(struct vcpu *v,
232                                 unsigned long addr,
233                                 unsigned long length,
234                                 unsigned long val);
235 typedef int (*hvm_mmio_check_t)(struct vcpu *v, unsigned long addr);
236 
237 
238 struct hvm_mmio_ops
239 {
240     hvm_mmio_check_t check;
241     hvm_mmio_read_t  read;
242     hvm_mmio_write_t write;
243 };
244 
245 /* Marshalling and unmarshalling uses a buffer with size and cursor. */
246 typedef struct hvm_domain_context
247 {
248     uint32_t cur;
249     uint32_t size;
250     uint8_t *data;
251 } hvm_domain_context_t;
252 
253 int current_domain_id(void);
254 #define dprintk(_l, _f, _a...)                  \
255     printk(_l "%s:%d: " _f, __FILE__ , __LINE__ , ## _a )
256 #define gdprintk(_l, _f, _a...)                         \
257     printk(XENLOG_GUEST _l "%s:%d:d%d " _f, __FILE__,   \
258            __LINE__, current_domain_id() , ## _a )
259 struct vcpu *get_current();
260 #define current get_current()
261 
262 #define HVM_SAVE_CODE(_x) HVM_SAVE_CODE_##_x
263 #define HVM_SAVE_LENGTH(_x) HVM_SAVE_LENGTH_##_x
264 
265 /*
266  * HPET
267  */
268 
269 uint64_t hvm_get_guest_time(struct vcpu *v);
270 
271 #define HPET_TIMER_NUM     3    /* 3 timers supported now */
272 struct hvm_hw_hpet
273 {
274     /* Memory-mapped, software visible registers */
275     uint64_t capability;        /* capabilities */
276     uint64_t res0;              /* reserved */
277     uint64_t config;            /* configuration */
278     uint64_t res1;              /* reserved */
279     uint64_t isr;               /* interrupt status reg */
280     uint64_t res2[25];          /* reserved */
281     uint64_t mc64;              /* main counter */
282     uint64_t res3;              /* reserved */
283     struct                      /* timers */
284     {
285         uint64_t config;        /* configuration/cap */
286         uint64_t cmp;           /* comparator */
287         uint64_t fsb;           /* FSB route, not supported now */
288         uint64_t res4;          /* reserved */
289     } timers[HPET_TIMER_NUM];
290     uint64_t res5[4 * (24 - HPET_TIMER_NUM)]; /* reserved, up to 0x3ff */
291 
292     /* Hidden register state */
293     uint64_t period[HPET_TIMER_NUM]; /* Last value written to comparator */
294 };
295 
296 typedef int (*hvm_save_handler)(struct domain *d,
297                                 hvm_domain_context_t *h);
298 typedef int (*hvm_load_handler)(struct domain *d,
299                                 hvm_domain_context_t *h);
300 
301 struct hvm_save_descriptor
302 {
303     uint16_t typecode;          /* Used to demux the various types below */
304     uint16_t instance;          /* Further demux within a type */
305     uint32_t length;            /* In bytes, *not* including this descriptor */
306 };
307 
308 void hvm_register_savevm(uint16_t typecode,
309                          const char *name,
310                          hvm_save_handler save_state,
311                          hvm_load_handler load_state,
312                          size_t size, int kind);
313 
314 #define HVMSR_PER_DOM 1
315 
316 #define HVM_REGISTER_SAVE_RESTORE(_x, _save, _load, _num, _k)       \
317     int __init __hvm_register_##_x##_save_and_restore(void)     \
318     {                                                                   \
319         hvm_register_savevm(HVM_SAVE_CODE(_x),                          \
320                             #_x,                                        \
321                             &_save,                                     \
322                             &_load,                                     \
323                             (_num) * (HVM_SAVE_LENGTH(_x)               \
324                                  + sizeof(struct hvm_save_descriptor)), \
325                             _k);                                        \
326         return 0;                                                       \
327     }                                                                   \
328 
329 #define HVM_SAVE_CODE_HPET 0
330 #define HVM_SAVE_LENGTH_HPET sizeof(struct hvm_hw_hpet)
331 
332 #define printk printf
333 
334 #define spin_lock(a)
335 #define spin_unlock(a)
336 #define spin_lock_init(a)
337 #define spin_is_locked(a) 1
338 #define ASSERT(a)
339 
340 #define ADDR (*(volatile long *) addr)
341 
__set_bit(int nr,volatile void * addr)342 static inline void __set_bit(int nr, volatile void *addr)
343 {
344     asm volatile(
345         "btsl %1,%0"
346         : "=m"(ADDR)
347         : "Ir"(nr), "m"(ADDR) : "memory");
348 }
349 
__clear_bit(int nr,volatile void * addr)350 static inline void __clear_bit(int nr, volatile void *addr)
351 {
352     asm volatile(
353         "btrl %1,%0"
354         : "=m"(ADDR)
355         : "Ir"(nr), "m"(ADDR) : "memory");
356 }
357 
find_first_set_bit(unsigned long word)358 static inline unsigned int find_first_set_bit(unsigned long word)
359 {
360     asm("bsf %1,%0" : "=r"(word) : "r"(word));
361     return (unsigned int)word;
362 }
363 
364 #define HVM_DBG_LOG(level, _f, _a...)                   \
365     do {                                \
366         printf("[HVM:%d.%d] <%s> " _f "\n",                             \
367                current->domain->domain_id, current->vcpu_id, __func__,  \
368                ## _a);                                                  \
369     } while ( 0 )
370 
371 void __domain_crash(struct domain *d);
372 #define domain_crash(d) do {                        \
373         printf("domain_crash called from %s:%d\n", __FILE__, __LINE__); \
374         __domain_crash(d);                                              \
375     } while ( 0 )
376 
377 #define MICROSECS(_us) ((s_time_t)((_us) * 1000ULL))
378 
379 #define pt_global_vcpu_target(d)        \
380     ((d)->vcpu ? (d)->vcpu[0] : NULL)
381 
382 #define TRACE_0D(a)
383 #define TRACE_1D(a, b)
384 #define TRACE_2D(a, b, c)
385 #define TRACE_3D(a, b, c, d)
386 #define TRACE_4D(a, b, c, d, e)
387 #define TRACE_5D(a, b, c, d, e, f)
388 #define TRACE_6D(a, b, c, d, e, f, g)
389 
390 #define TRC_PAR_LONG(par) ((par)&0xFFFFFFFF),((par)>>32)
391 
392 #define TRACE_2_LONG_2D(_e, d1, d2, ...) \
393     TRACE_4D(_e, d1, d2)
394 #define TRACE_2_LONG_3D(_e, d1, d2, d3, ...) \
395     TRACE_5D(_e, d1, d2, d3)
396 #define TRACE_2_LONG_4D(_e, d1, d2, d3, d4, ...) \
397     TRACE_6D(_e, d1, d2, d3, d4)
398 
399 /* debug */
400 
401 extern int __read_mostly hpet_debug;
402 extern uint64_t __read_mostly hpet_force_diff;
403 extern uint64_t __read_mostly hpet_force_mc64;
404 extern uint64_t __read_mostly hpet_force_cmp;
405 extern uint64_t __read_mostly hpet_force_period;
406 
407 /*
408  * Local variables:
409  * mode: C
410  * c-file-style: "BSD"
411  * c-basic-offset: 4
412  * indent-tabs-mode: nil
413  * End:
414  */
415