AES single round encryption.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | Rn | Rd | ||||||||
D |
integer d = UInt(Rd); integer n = UInt(Rn); if !HaveAESExt() then UNDEFINED; boolean decrypt = (D == '1');
<Vd> |
Is the name of the SIMD&FP source and destination register, encoded in the "Rd" field. |
<Vn> |
Is the name of the second SIMD&FP source register, encoded in the "Rn" field. |
AArch64.CheckFPAdvSIMDEnabled(); bits(128) operand1 = V[d]; bits(128) operand2 = V[n]; bits(128) result; result = operand1 EOR operand2; if decrypt then result = AESInvSubBytes(AESInvShiftRows(result)); else result = AESSubBytes(AESShiftRows(result)); V[d] = result;
If PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
Copyright © 2010-2021 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.