Complex integer add with rotate
Add the real and imaginary components of the integral complex numbers from the first source vector to the complex numbers from the second source vector which have first been rotated by 90 or 270 degrees in the direction from the positive real axis towards the positive imaginary axis, when considered in polar representation, equivalent to multiplying the complex numbers in the second source vector by ±j beforehand. Destructively place the results in the corresponding elements of the first source vector. This instruction is unpredicated.
Each complex number is represented in a vector register as an even/odd pair of elements with the real part in the even-numbered element and the imaginary part in the odd-numbered element.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | size | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | rot | Zm | Zdn |
if !HaveSVE2() && !HaveSME() then UNDEFINED; integer esize = 8 << UInt(size); integer m = UInt(Zm); integer dn = UInt(Zdn); boolean sub_i = (rot == '0'); boolean sub_r = (rot == '1');
<Zdn> |
Is the name of the first source and destination scalable vector register, encoded in the "Zdn" field. |
<T> |
Is the size specifier,
encoded in
|
<Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
<const> |
Is the const specifier,
encoded in
|
CheckSVEEnabled(); integer pairs = VL DIV (2 * esize); bits(VL) operand1 = Z[dn]; bits(VL) operand2 = Z[m]; bits(VL) result; for p = 0 to pairs-1 integer acc_r = SInt(Elem[operand1, 2 * p + 0, esize]); integer acc_i = SInt(Elem[operand1, 2 * p + 1, esize]); integer elt2_r = SInt(Elem[operand2, 2 * p + 0, esize]); integer elt2_i = SInt(Elem[operand2, 2 * p + 1, esize]); if sub_i then acc_r = acc_r - elt2_i; acc_i = acc_i + elt2_r; if sub_r then acc_r = acc_r + elt2_i; acc_i = acc_i - elt2_r; Elem[result, 2 * p + 0, esize] = acc_r<esize-1:0>; Elem[result, 2 * p + 1, esize] = acc_i<esize-1:0>; Z[dn] = result;
If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX instruction must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is unpredictable:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
Copyright © 2010-2021 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.