CSEL

If the condition is true, Conditional Select writes the value of the first source register to the destination register. If the condition is false, it writes the value of the second source register to the destination register.

313029282726252423222120191817161514131211109876543210
sf0011010100Rmcond00RnRd
opo2

32-bit (sf == 0)

CSEL <Wd>, <Wn>, <Wm>, <cond>

64-bit (sf == 1)

CSEL <Xd>, <Xn>, <Xm>, <cond>

integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); integer datasize = if sf == '1' then 64 else 32; bits(4) condition = cond; boolean else_inv = (op == '1'); boolean else_inc = (o2 == '1');

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Wm>

Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field.

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field.

<Xm>

Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field.

<cond>

Is one of the standard conditions, encoded in the "cond" field in the standard way.

Operation

bits(datasize) result; if ConditionHolds(condition) then result = X[n]; else result = X[m]; if else_inv then result = NOT(result); if else_inc then result = result + 1; X[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

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