Conditional Select Increment returns, in the destination register, the value of the first source register if the condition is TRUE, and otherwise returns the value of the second source register incremented by 1.
This instruction is used by the aliases CINC, and CSET.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | Rm | cond | 0 | 1 | Rn | Rd | |||||||||||||||
| op | o2 | ||||||||||||||||||||||||||||||
integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); integer datasize = if sf == '1' then 64 else 32; bits(4) condition = cond; boolean else_inv = (op == '1'); boolean else_inc = (o2 == '1');
| <Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Wn> |
Is the 32-bit name of the first general-purpose source register, encoded in the "Rn" field. |
| <Wm> |
Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field. |
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Xn> |
Is the 64-bit name of the first general-purpose source register, encoded in the "Rn" field. |
| <Xm> |
Is the 64-bit name of the second general-purpose source register, encoded in the "Rm" field. |
| <cond> |
Is one of the standard conditions, encoded in the "cond" field in the standard way. |
| Alias | Is preferred when |
|---|---|
| CINC | Rm != '11111' && cond != '111x' && Rn != '11111' && Rn == Rm |
| CSET | Rm == '11111' && cond != '111x' && Rn == '11111' |
bits(datasize) result; if ConditionHolds(condition) then result = X[n]; else result = X[m]; if else_inv then result = NOT(result); if else_inc then result = result + 1; X[d] = result;
If PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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