Decrement scalar by count of true predicate elements
Counts the number of true elements in the source predicate and then uses the result to decrement the scalar destination.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | size | 1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | Pm | Rdn | ||||||||
D |
if !HaveSVE() && !HaveSME() then UNDEFINED; integer esize = 8 << UInt(size); integer m = UInt(Pm); integer dn = UInt(Rdn);
<Xdn> |
Is the 64-bit name of the source and destination general-purpose register, encoded in the "Rdn" field. |
<Pm> |
Is the name of the source scalable predicate register, encoded in the "Pm" field. |
<T> |
Is the size specifier,
encoded in
|
CheckSVEEnabled(); integer elements = VL DIV esize; bits(64) operand1 = X[dn]; bits(PL) operand2 = P[m]; integer count = 0; for e = 0 to elements-1 if ElemP[operand2, e, esize] == '1' then count = count + 1; X[dn] = operand1 - count;
If FEAT_SME is implemented and the PE is in Streaming SVE mode, then any subsequent instruction which is dependent on the general-purpose register written by this instruction might be significantly delayed.
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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