Duplicate vector element to vector or scalar. This instruction duplicates the vector element at the specified element index in the source SIMD&FP register into a scalar or each element in a vector, and writes the result to the destination SIMD&FP register.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
This instruction is used by the alias MOV (scalar).
It has encodings from 2 classes: Scalar and Vector
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | imm5 | 0 | 0 | 0 | 0 | 0 | 1 | Rn | Rd |
integer d = UInt(Rd); integer n = UInt(Rn); integer size = LowestSetBit(imm5); if size > 3 then UNDEFINED; integer index = UInt(imm5<4:size+1>); integer idxdsize = if imm5<4> == '1' then 128 else 64; integer esize = 8 << size; integer datasize = esize; integer elements = 1;
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | Q | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | imm5 | 0 | 0 | 0 | 0 | 0 | 1 | Rn | Rd |
integer d = UInt(Rd); integer n = UInt(Rn); integer size = LowestSetBit(imm5); if size > 3 then UNDEFINED; integer index = UInt(imm5<4:size+1>); integer idxdsize = if imm5<4> == '1' then 128 else 64; if size == 3 && Q == '0' then UNDEFINED; integer esize = 8 << size; integer datasize = if Q == '1' then 128 else 64; integer elements = datasize DIV esize;
<Ts> |
Is an element size specifier,
encoded in
|
<V> |
Is the destination width specifier,
encoded in
|
<Vn> |
Is the name of the SIMD&FP source register, encoded in the "Rn" field. |
<index> |
Is the element index
encoded in
|
<d> |
Is the number of the SIMD&FP destination register, encoded in the "Rd" field. |
<Vd> |
Is the name of the SIMD&FP destination register, encoded in the "Rd" field. |
CheckFPAdvSIMDEnabled64(); bits(idxdsize) operand = V[n]; bits(datasize) result; bits(esize) element; element = Elem[operand, index, esize]; for e = 0 to elements-1 Elem[result, e, esize] = element; V[d] = result;
If PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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