EOR (immediate)

Bitwise Exclusive OR (immediate) performs a bitwise Exclusive OR of a register value and an immediate value, and writes the result to the destination register.

313029282726252423222120191817161514131211109876543210
sf10100100NimmrimmsRnRd
opc

32-bit (sf == 0 && N == 0)

EOR <Wd|WSP>, <Wn>, #<imm>

64-bit (sf == 1)

EOR <Xd|SP>, <Xn>, #<imm>

integer d = UInt(Rd); integer n = UInt(Rn); integer datasize = if sf == '1' then 64 else 32; boolean setflags; LogicalOp op; case opc of when '00' op = LogicalOp_AND; setflags = FALSE; when '01' op = LogicalOp_ORR; setflags = FALSE; when '10' op = LogicalOp_EOR; setflags = FALSE; when '11' op = LogicalOp_AND; setflags = TRUE; bits(datasize) imm; if sf == '0' && N != '0' then UNDEFINED; (imm, -) = DecodeBitMasks(N, imms, immr, TRUE);

Assembler Symbols

<Wd|WSP>

Is the 32-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

<Xd|SP>

Is the 64-bit name of the destination general-purpose register or stack pointer, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

<imm>

For the 32-bit variant: is the bitmask immediate, encoded in "imms:immr".

For the 64-bit variant: is the bitmask immediate, encoded in "N:imms:immr".

Operation

bits(datasize) result; bits(datasize) operand1 = X[n]; bits(datasize) operand2 = imm; case op of when LogicalOp_AND result = operand1 AND operand2; when LogicalOp_ORR result = operand1 OR operand2; when LogicalOp_EOR result = operand1 EOR operand2; if setflags then PSTATE.<N,Z,C,V> = result<datasize-1>:IsZeroBit(result):'00'; if d == 31 && !setflags then SP[] = result; else X[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

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