FCVTZS (vector, fixed-point)

Floating-point Convert to Signed fixed-point, rounding toward Zero (vector). This instruction converts a scalar or each element in a vector from floating-point to fixed-point signed integer using the Round towards Zero rounding mode, and writes the result to the SIMD&FP destination register.

A floating-point exception can be generated by this instruction. Depending on the settings in FPCR, the exception results in either a flag being set in FPSR, or a synchronous exception being generated. For more information, see Floating-point exception traps.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the Security state and Exception level in which the instruction is executed, an attempt to execute the instruction might be trapped.

It has encodings from 2 classes: Scalar and Vector

Scalar

integer d = UInt(Rd); integer n = UInt(Rn); if immh == '000x' || (immh == '001x' && !HaveFP16Ext()) then UNDEFINED; integer esize = if immh == '1xxx' then 64 else if immh == '01xx' then 32 else 16; integer datasize = esize; integer elements = 1; integer fracbits = (esize * 2) - UInt(immh:immb); boolean unsigned = (U == '1'); FPRounding rounding = FPRounding_ZERO;

Vector

integer d = UInt(Rd); integer n = UInt(Rn); if immh == '0000' then SEE(asimdimm); if immh == '000x' || (immh == '001x' && !HaveFP16Ext()) then UNDEFINED; if immh<3>:Q == '10' then UNDEFINED; integer esize = if immh == '1xxx' then 64 else if immh == '01xx' then 32 else 16; integer datasize = if Q == '1' then 128 else 64; integer elements = datasize DIV esize; integer fracbits = (esize * 2) - UInt(immh:immb); boolean unsigned = (U == '1'); FPRounding rounding = FPRounding_ZERO;