FCVTZU (scalar, fixed-point)

Floating-point Convert to Unsigned fixed-point, rounding toward Zero (scalar). This instruction converts the floating-point value in the SIMD&FP source register to a 32-bit or 64-bit fixed-point unsigned integer using the Round towards Zero rounding mode, and writes the result to the general-purpose destination register.

A floating-point exception can be generated by this instruction. Depending on the settings in FPCR, the exception results in either a flag being set in FPSR, or a synchronous exception being generated. For more information, see Floating-point exception traps.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the Security state and Exception level in which the instruction is executed, an attempt to execute the instruction might be trapped.

integer d = UInt(Rd); integer n = UInt(Rn); integer intsize = if sf == '1' then 64 else 32; integer fltsize; FPConvOp op; FPRounding rounding; boolean unsigned; case ftype of when '00' fltsize = 32; when '01' fltsize = 64; when '10' UNDEFINED; when '11' if HaveFP16Ext() then fltsize = 16; else UNDEFINED; if sf == '0' && scale<5> == '0' then UNDEFINED; integer fracbits = 64 - UInt(scale); case opcode<2:1>:rmode of when '00 11' // FCVTZ rounding = FPRounding_ZERO; unsigned = (opcode<0> == '1'); op = FPConvOp_CVT_FtoI; when '01 00' // [US]CVTF rounding = FPRoundingMode(FPCR[]); unsigned = (opcode<0> == '1'); op = FPConvOp_CVT_ItoF; otherwise UNDEFINED;