INDEX (immediates)

Populates the destination vector by setting the first element to the first signed immediate integer operand and monotonically incrementing the value by the second signed immediate integer operand for each subsequent element. This instruction is unpredicated.

if !HaveSVE() && !HaveSME() then UNDEFINED; integer esize = 8 << UInt(size); integer d = UInt(Zd); integer imm1 = SInt(imm5); integer imm2 = SInt(imm5b);

Assembler Symbols

<Zd>	Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T>

Is the size specifier, encoded in size:

size	<T>
00	B
01	H
10	S
11	D

<imm1>

Is the first signed immediate operand, in the range -16 to 15, encoded in the "imm5" field.

<imm2>

Is the second signed immediate operand, in the range -16 to 15, encoded in the "imm5b" field.

Operation

CheckSVEEnabled(); integer elements = VL DIV esize; bits(VL) result; for e = 0 to elements-1 integer index = imm1 + e * imm2; Elem[result, e, esize] = index<esize-1:0>; Z[d] = result;

Operational information

If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:

The execution time of this instruction is independent of:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.
The response of this instruction to asynchronous exceptions does not vary based on:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.

Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	0	size		1	imm5b					0	1	0	0	0	0	imm5					Zd