Create index starting from and incremented by general-purpose register
Populates the destination vector by setting the first element to the first signed scalar integer operand and monotonically incrementing the value by the second signed scalar integer operand for each subsequent element. The scalar source operands are general-purpose registers in which only the least significant bits corresponding to the vector element size are used and any remaining bits are ignored. This instruction is unpredicated.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | size | 1 | Rm | 0 | 1 | 0 | 0 | 1 | 1 | Rn | Zd | |||||||||||||
if !HaveSVE() && !HaveSME() then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Rn); integer m = UInt(Rm); integer d = UInt(Zd);
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <T> |
Is the size specifier,
encoded in
|
| <R> |
Is a width specifier,
encoded in
|
| <n> |
Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rn" field. |
| <m> |
Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rm" field. |
CheckSVEEnabled(); integer elements = VL DIV esize; bits(esize) operand1 = X[n]; integer element1 = SInt(operand1); bits(esize) operand2 = X[m]; integer element2 = SInt(operand2); bits(VL) result; for e = 0 to elements-1 integer index = element1 + e * element2; Elem[result, e, esize] = index<esize-1:0>; Z[d] = result;
If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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