LD1W

Contiguous load of words to 32-bit element ZA tile slice

The slice number within the tile is selected by the sum of the slice index register and an immediate, modulo the number of 32-bit elements in a Streaming SVE vector. The immediate is in the range 0 to 3. The memory address is generated by scalar base and optional scalar offset which is multiplied by 4 and added to the base address. Inactive elements will not cause a read from Device memory or signal a fault, and are set to zero in the destination vector.

SME
(FEAT_SME)

313029282726252423222120191817161514131211109876543210
11100000100RmVRsPgRn0ZAtimm2
msz<1>msz<0>

LD1W { <ZAt><HV>.S[<Ws>, <imm>] }, <Pg>/Z, [<Xn|SP>{, <Xm>, LSL #2}]

if !HaveSME() then UNDEFINED; integer n = UInt(Rn); integer m = UInt(Rm); integer g = UInt('0':Pg); integer s = UInt('011':Rs); integer t = UInt(ZAt); integer imm = UInt(imm2); integer esize = 32; boolean vertical = V == '1';

Assembler Symbols

<ZAt>

Is the name of the ZA tile ZA0-ZA3 to be accessed, encoded in the "ZAt" field.

<HV>

Is the horizontal or vertical slice indicator, encoded in V:

V <HV>
0 H
1 V
<Ws>

Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field.

<imm>

Is the slice index offset, in the range 0 to 3, encoded in the "imm2" field.

<Pg>

Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.

<Xm>

Is the optional 64-bit name of the general-purpose offset register, defaulting to XZR, encoded in the "Rm" field.

Operation

CheckStreamingSVEAndZAEnabled(); integer dim = VL DIV esize; bits(64) base; bits(64) addr; bits(64) offset; bits(PL) mask = P[g]; bits(VL) result; bits(32) index = X[s]; integer slice = (UInt(index) + imm) MOD dim; constant integer mbytes = esize DIV 8; if HaveMTEExt() then SetTagCheckedInstruction(TRUE); if n == 31 then if LastActiveElement(mask, esize) >= 0 || ConstrainUnpredictableBool(Unpredictable_CHECKSPNONEACTIVE) then CheckSPAlignment(); base = SP[]; else base = X[n]; offset = X[m]; for e = 0 to dim - 1 addr = base + UInt(offset) * mbytes; if ElemP[mask, e, esize] == '1' then Elem[result, e, esize] = Mem[addr, mbytes, AccType_NORMAL]; else Elem[result, e, esize] = Zeros(); offset = offset + 1; ZAslice[t, esize, vertical, slice] = result;


Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

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