LDNT1W (vector plus scalar)

Gather load non-temporal of unsigned words to active elements of a vector register from memory addresses generated by a vector base plus a 64-bit unscaled scalar register offset. Inactive elements will not cause a read from Device memory or signal faults, and are set to zero in the destination vector.

A non-temporal load is a hint to the system that this data is unlikely to be referenced again soon.

32-bit unscaled offset

if !HaveSVE2() then UNDEFINED; integer t = UInt(Zt); integer n = UInt(Zn); integer m = UInt(Rm); integer g = UInt(Pg); integer esize = 32; integer msize = 32; boolean unsigned = TRUE;

64-bit unscaled offset

if !HaveSVE2() then UNDEFINED; integer t = UInt(Zt); integer n = UInt(Zn); integer m = UInt(Rm); integer g = UInt(Pg); integer esize = 64; integer msize = 32; boolean unsigned = TRUE;

Assembler Symbols

<Zt>	Is the name of the scalable vector register to be transferred, encoded in the "Zt" field.

<Pg>	Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Zn>	Is the name of the base scalable vector register, encoded in the "Zn" field.

<Xm>	Is the optional 64-bit name of the general-purpose offset register, defaulting to XZR, encoded in the "Rm" field.

Operation

CheckNonStreamingSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = P[g]; bits(VL) base; bits(64) offset; bits(VL) result; bits(msize) data; constant integer mbytes = msize DIV 8; if HaveMTEExt() then SetTagCheckedInstruction(TRUE); if AnyActiveElement(mask, esize) then base = Z[n]; offset = X[m]; for e = 0 to elements-1 if ElemP[mask, e, esize] == '1' then bits(64) addr = ZeroExtend(Elem[base, e, esize], 64) + offset; data = Mem[addr, mbytes, AccType_STREAM]; Elem[result, e, esize] = Extend(data, esize, unsigned); else Elem[result, e, esize] = Zeros(); Z[t] = result;

Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	0	0	0	0	1	0	1	0	0	0	Rm					1	0	1	Pg			Zn					Zt
							msz<1>	msz<0>										U

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
1	1	0	0	0	1	0	1	0	0	0	Rm					1	1	0	Pg			Zn					Zt
							msz<1>	msz<0>									U