Logical Shift Right (immediate) shifts a register value right by an immediate number of bits, shifting in zeros, and writes the result to the destination register.
This is an alias of UBFM. This means:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | N | immr | x | 1 | 1 | 1 | 1 | 1 | Rn | Rd | |||||||||||||
| opc | imms | ||||||||||||||||||||||||||||||
is equivalent to
UBFM <Wd>, <Wn>, #<shift>, #31
and is always the preferred disassembly.
is equivalent to
UBFM <Xd>, <Xn>, #<shift>, #63
and is always the preferred disassembly.
| <Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Wn> |
Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field. |
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Xn> |
Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field. |
| <shift> |
For the 32-bit variant: is the shift amount, in the range 0 to 31, encoded in the "immr" field. |
|
For the 64-bit variant: is the shift amount, in the range 0 to 63, encoded in the "immr" field. |
The description of UBFM gives the operational pseudocode for this instruction.
If PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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