PUNPKHI, PUNPKLO

Unpack elements from the lowest or highest half of the source predicate and place in elements of twice their size within the destination predicate. This instruction is unpredicated.

High half

if !HaveSVE() && !HaveSME() then UNDEFINED; integer esize = 16; integer n = UInt(Pn); integer d = UInt(Pd); boolean hi = TRUE;

Low half

if !HaveSVE() && !HaveSME() then UNDEFINED; integer esize = 16; integer n = UInt(Pn); integer d = UInt(Pd); boolean hi = FALSE;

Assembler Symbols

<Pd>	Is the name of the destination scalable predicate register, encoded in the "Pd" field.

<Pn>	Is the name of the source scalable predicate register, encoded in the "Pn" field.

Operation

CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) operand = P[n]; bits(PL) result; for e = 0 to elements-1 ElemP[result, e, esize] = ElemP[operand, if hi then e + elements else e, esize DIV 2]; P[d] = result;

Operational information

If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:

The execution time of this instruction is independent of:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.
The response of this instruction to asynchronous exceptions does not vary based on:
- The values of the data supplied in any of its registers.
- The values of the NZCV flags.

Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	0	0	1	1	0	0	0	1	0	1	0	0	0	0	0	Pn				0	Pd
															H

31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
0	0	0	0	0	1	0	1	0	0	1	1	0	0	0	0	0	1	0	0	0	0	0	Pn				0	Pd
															H