RDFFRS

Return predicate of succesfully loaded elements, setting the condition flags

Read the first-fault register (FFR) and place active elements in the corresponding elements of the destination predicate. Inactive elements in the destination predicate register are set to zero. Sets the First (N), None (Z), !Last (C) condition flags based on the predicate result, and the V flag to zero.

313029282726252423222120191817161514131211109876543210
00100101010110001111000Pg0Pd
S

RDFFRS <Pd>.B, <Pg>/Z

if !HaveSVE() then UNDEFINED; integer g = UInt(Pg); integer d = UInt(Pd); boolean setflags = TRUE;

Assembler Symbols

<Pd>

Is the name of the destination scalable predicate register, encoded in the "Pd" field.

<Pg>

Is the name of the governing scalable predicate register, encoded in the "Pg" field.

Operation

CheckNonStreamingSVEEnabled(); bits(PL) mask = P[g]; bits(PL) ffr = FFR[]; bits(PL) result = ffr AND mask; if setflags then PSTATE.<N,Z,C,V> = PredTest(mask, result, 8); P[d] = result;

Operational information

If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:


Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

Copyright © 2010-2021 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.