Read multiple of vector register size to scalar register
Multiply the current vector register size in bytes by an immediate in the range -32 to 31 and place the result in the 64-bit destination general-purpose register.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | imm6 | Rd | |||||||||
if !HaveSVE() && !HaveSME() then UNDEFINED; integer d = UInt(Rd); integer imm = SInt(imm6);
| <Xd> |
Is the 64-bit name of the destination general-purpose register, encoded in the "Rd" field. |
| <imm> |
Is the signed immediate operand, in the range -32 to 31, encoded in the "imm6" field. |
If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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