REV16

Reverse bytes in 16-bit halfwords reverses the byte order in each 16-bit halfword of a register.

313029282726252423222120191817161514131211109876543210
sf101101011000000000001RnRd
opc

32-bit (sf == 0)

REV16 <Wd>, <Wn>

64-bit (sf == 1)

REV16 <Xd>, <Xn>

integer d = UInt(Rd); integer n = UInt(Rn); integer datasize = if sf == '1' then 64 else 32; integer container_size; case opc of when '00' Unreachable(); when '01' container_size = 16; when '10' container_size = 32; when '11' if sf == '0' then UNDEFINED; container_size = 64;

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn>

Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field.

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn>

Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field.

Operation

bits(datasize) operand = X[n]; bits(datasize) result; integer containers = datasize DIV container_size; integer elements_per_container = container_size DIV 8; integer index = 0; integer rev_index; for c = 0 to containers-1 rev_index = index + ((elements_per_container - 1) * 8); for e = 0 to elements_per_container-1 result<rev_index + 7:rev_index> = operand<index + 7:index>; index = index + 8; rev_index = rev_index - 8; X[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41

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