Rotate right (immediate) provides the value of the contents of a register rotated by a variable number of bits. The bits that are rotated off the right end are inserted into the vacated bit positions on the left.
This is an alias of EXTR. This means:
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | N | 0 | Rm | imms | Rn | Rd | |||||||||||||||||
is equivalent to
EXTR <Wd>, <Ws>, <Ws>, #<shift>
and is the preferred disassembly when Rn == Rm.
is equivalent to
EXTR <Xd>, <Xs>, <Xs>, #<shift>
and is the preferred disassembly when Rn == Rm.
| <Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Ws> |
Is the 32-bit name of the general-purpose source register, encoded in the "Rn" and "Rm" fields. |
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Xs> |
Is the 64-bit name of the general-purpose source register, encoded in the "Rn" and "Rm" fields. |
The description of EXTR gives the operational pseudocode for this instruction.
If PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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