Signed multiply long (bottom, indexed)
Multiply the even-numbered signed elements within each 128-bit segment of the first source vector by the specified signed element in the corresponding second source vector segment, and place the results in the overlapping double-width elements of the destination vector register.
The elements within the second source vector are specified using an immediate index which selects the same element position within each 128-bit vector segment. The index range is from 0 to one less than the number of elements per 128-bit segment, encoded in 2 or 3 bits depending on the size of the element.
It has encodings from 2 classes: 32-bit and 64-bit
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | i3h | Zm | 1 | 1 | 0 | 0 | i3l | 0 | Zn | Zd | |||||||||||
size<1> | size<0> | U | T |
if !HaveSVE2() && !HaveSME() then UNDEFINED; integer esize = 16; integer index = UInt(i3h:i3l); integer n = UInt(Zn); integer m = UInt(Zm); integer d = UInt(Zd); integer sel = 0;
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | i2h | Zm | 1 | 1 | 0 | 0 | i2l | 0 | Zn | Zd | |||||||||||
size<1> | size<0> | U | T |
if !HaveSVE2() && !HaveSME() then UNDEFINED; integer esize = 32; integer index = UInt(i2h:i2l); integer n = UInt(Zn); integer m = UInt(Zm); integer d = UInt(Zd); integer sel = 0;
<Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
<Zn> |
Is the name of the first source scalable vector register, encoded in the "Zn" field. |
CheckSVEEnabled(); integer elements = VL DIV (2 * esize); integer eltspersegment = 128 DIV (2 * esize); bits(VL) operand1 = Z[n]; bits(VL) operand2 = Z[m]; bits(VL) result; for e = 0 to elements-1 integer s = e - (e MOD eltspersegment); integer element1 = SInt(Elem[operand1, 2 * e + sel, esize]); integer element2 = SInt(Elem[operand2, 2 * s + index, esize]); integer res = element1 * element2; Elem[result, e, 2*esize] = res<2*esize-1:0>; Z[d] = result;
If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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