Saturating rounding doubling complex integer multiply-add high with rotate
Multiply without saturation the duplicated real components for rotations 0 and 180, or imaginary components for rotations 90 and 270, of the integral numbers in the first source vector by the corresponding complex number in the second source vector rotated by 0, 90, 180 or 270 degrees in the direction from the positive real axis towards the positive imaginary axis, when considered in polar representation.
Then double and add the products to the corresponding components of the complex numbers in the addend vector. Destructively place the most significant rounded half of the results in the corresponding elements of the addend vector. Each result element is saturated to the N-bit element's signed integer range -2(N-1) to (2(N-1) )-1. This instruction is unpredicated.
These transformations permit the creation of a variety of multiply-add and multiply-subtract operations on complex numbers by combining two of these instructions with the same vector operands but with rotations that are 90 degrees apart.
Each complex number is represented in a vector register as an even/odd pair of elements with the real part in the even-numbered element and the imaginary part in the odd-numbered element.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | size | 0 | Zm | 0 | 0 | 1 | 1 | rot | Zn | Zda |
if !HaveSVE2() && !HaveSME() then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Zn); integer m = UInt(Zm); integer da = UInt(Zda); integer sel_a = UInt(rot<0>); integer sel_b = UInt(NOT(rot<0>)); boolean sub_r = (rot<0> != rot<1>); boolean sub_i = (rot<1> == '1');
<Zda> |
Is the name of the third source and destination scalable vector register, encoded in the "Zda" field. |
<T> |
Is the size specifier,
encoded in
|
<Zn> |
Is the name of the first source scalable vector register, encoded in the "Zn" field. |
<Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
<const> |
Is the const specifier,
encoded in
|
CheckSVEEnabled(); integer pairs = VL DIV (2 * esize); bits(VL) operand1 = Z[n]; bits(VL) operand2 = Z[m]; bits(VL) operand3 = Z[da]; bits(VL) result; integer round_const = 1 << (esize-1); integer res_r, res_i; for p = 0 to pairs-1 integer elt1_a = SInt(Elem[operand1, 2 * p + sel_a, esize]); integer elt2_a = SInt(Elem[operand2, 2 * p + sel_a, esize]); integer elt2_b = SInt(Elem[operand2, 2 * p + sel_b, esize]); bits(esize) elt3_r = Elem[operand3, 2 * p + 0, esize]; bits(esize) elt3_i = Elem[operand3, 2 * p + 1, esize]; integer product_r = elt1_a * elt2_a; integer product_i = elt1_a * elt2_b; if sub_r then res_r = (SInt(elt3_r) << esize) - 2 * product_r + round_const; else res_r = (SInt(elt3_r) << esize) + 2 * product_r + round_const; if sub_i then res_i = (SInt(elt3_i) << esize) - 2 * product_i + round_const; else res_i = (SInt(elt3_i) << esize) + 2 * product_i + round_const; Elem[result, 2 * p + 0, esize] = SignedSat(res_r >> esize, esize); Elem[result, 2 * p + 1, esize] = SignedSat(res_i >> esize, esize); Z[da] = result;
This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX instruction must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is unpredictable:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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