Contiguous store of doublewords from 64-bit element ZA tile slice
The slice number within the tile is selected by the sum of the slice index register and an immediate, modulo the number of 64-bit elements in a Streaming SVE vector. The immediate is in the range 0 to 1. The memory address is generated by scalar base and optional scalar offset which is multiplied by 8 and added to the base address. Inactive elements are not written to memory.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | Rm | V | Rs | Pg | Rn | 0 | ZAt | i1 | |||||||||||||
| msz<1> | msz<0> | ||||||||||||||||||||||||||||||
if !HaveSME() then UNDEFINED; integer n = UInt(Rn); integer m = UInt(Rm); integer g = UInt('0':Pg); integer s = UInt('011':Rs); integer t = UInt(ZAt); integer imm = UInt(i1); integer esize = 64; boolean vertical = V == '1';
| <ZAt> |
Is the name of the ZA tile ZA0-ZA7 to be accessed, encoded in the "ZAt" field. |
| <HV> |
Is the horizontal or vertical slice indicator,
encoded in
|
| <Ws> |
Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field. |
| <imm> |
Is the slice index offset, in the range 0 to 1, encoded in the "i1" field. |
| <Pg> |
Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field. |
| <Xn|SP> |
Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. |
| <Xm> |
Is the optional 64-bit name of the general-purpose offset register, defaulting to XZR, encoded in the "Rm" field. |
CheckStreamingSVEAndZAEnabled(); integer dim = VL DIV esize; bits(64) base; bits(64) addr; bits(PL) mask = P[g]; bits(64) offset = X[m]; bits(32) index = X[s]; integer slice = (UInt(index) + imm) MOD dim; bits(VL) src; constant integer mbytes = esize DIV 8; if HaveMTEExt() then SetTagCheckedInstruction(TRUE); if n == 31 then if LastActiveElement(mask, esize) >= 0 || ConstrainUnpredictableBool(Unpredictable_CHECKSPNONEACTIVE) then CheckSPAlignment(); base = SP[]; else base = X[n]; src = ZAslice[t, esize, vertical, slice]; for e = 0 to dim-1 addr = base + UInt(offset) * mbytes; if ElemP[mask, e, esize] == '1' then Mem[addr, mbytes, AccType_NORMAL] = Elem[src, e, esize]; offset = offset + 1;
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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