Signed unpack and extend half of vector
Unpack elements from the lowest or highest half of the source vector and then sign-extend them to place in elements of twice their size within the destination vector. This instruction is unpredicated.
It has encodings from 2 classes: High half and Low half
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | size | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | Zn | Zd | |||||||||
U | H |
if !HaveSVE() && !HaveSME() then UNDEFINED; if size == '00' then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Zn); integer d = UInt(Zd); boolean unsigned = FALSE; boolean hi = TRUE;
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | size | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | Zn | Zd | |||||||||
U | H |
if !HaveSVE() && !HaveSME() then UNDEFINED; if size == '00' then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Zn); integer d = UInt(Zd); boolean unsigned = FALSE; boolean hi = FALSE;
<Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
<T> |
Is the size specifier,
encoded in
|
<Zn> |
Is the name of the source scalable vector register, encoded in the "Zn" field. |
<Tb> |
Is the size specifier,
encoded in
|
CheckSVEEnabled(); integer elements = VL DIV esize; integer hsize = esize DIV 2; bits(VL) operand = Z[n]; bits(VL) result; for e = 0 to elements-1 bits(hsize) element = if hi then Elem[operand, e + elements, hsize] else Elem[operand, e, hsize]; Elem[result, e, esize] = Extend(element, esize, unsigned); Z[d] = result;
If FEAT_SVE2 is enabled or FEAT_SME is enabled, then when PSTATE.DIT is 1:
Internal version only: isa v33.11seprel, AdvSIMD v29.05, pseudocode v2021-09_rel, sve v2021-09_rc3d ; Build timestamp: 2021-10-06T11:41
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