ADC, ADCS (immediate): Add with Carry (immediate).
ADC, ADCS (register): Add with Carry (register).
ADC, ADCS (register-shifted register): Add with Carry (register-shifted register).
ADD (immediate, to PC): Add to PC: an alias of ADR.
ADD, ADDS (immediate): Add (immediate).
ADD, ADDS (register): Add (register).
ADD, ADDS (register-shifted register): Add (register-shifted register).
ADD, ADDS (SP plus immediate): Add to SP (immediate).
ADD, ADDS (SP plus register): Add to SP (register).
ADR: Form PC-relative address.
AND, ANDS (immediate): Bitwise AND (immediate).
AND, ANDS (register): Bitwise AND (register).
AND, ANDS (register-shifted register): Bitwise AND (register-shifted register).
ASR (immediate): Arithmetic Shift Right (immediate): an alias of MOV, MOVS (register).
ASR (register): Arithmetic Shift Right (register): an alias of MOV, MOVS (register-shifted register).
ASRS (immediate): Arithmetic Shift Right, setting flags (immediate): an alias of MOV, MOVS (register).
ASRS (register): Arithmetic Shift Right, setting flags (register): an alias of MOV, MOVS (register-shifted register).
B: Branch.
BFC: Bit Field Clear.
BFI: Bit Field Insert.
BIC, BICS (immediate): Bitwise Bit Clear (immediate).
BIC, BICS (register): Bitwise Bit Clear (register).
BIC, BICS (register-shifted register): Bitwise Bit Clear (register-shifted register).
BKPT: Breakpoint.
BL, BLX (immediate): Branch with Link and optional Exchange (immediate).
BLX (register): Branch with Link and Exchange (register).
BX: Branch and Exchange.
BXJ: Branch and Exchange, previously Branch and Exchange Jazelle.
CBNZ, CBZ: Compare and Branch on Nonzero or Zero.
CLRBHB: Clear Branch History.
CLREX: Clear-Exclusive.
CLZ: Count Leading Zeros.
CMN (immediate): Compare Negative (immediate).
CMN (register): Compare Negative (register).
CMN (register-shifted register): Compare Negative (register-shifted register).
CMP (immediate): Compare (immediate).
CMP (register): Compare (register).
CMP (register-shifted register): Compare (register-shifted register).
CPS, CPSID, CPSIE: Change PE State.
CRC32: CRC32.
CRC32C: CRC32C.
CSDB: Consumption of Speculative Data Barrier.
DBG: Debug hint.
DCPS1: Debug Change PE State to EL1.
DCPS2: Debug Change PE State to EL2.
DCPS3: Debug Change PE State to EL3.
DMB: Data Memory Barrier.
DSB: Data Synchronization Barrier.
EOR, EORS (immediate): Bitwise Exclusive-OR (immediate).
EOR, EORS (register): Bitwise Exclusive-OR (register).
EOR, EORS (register-shifted register): Bitwise Exclusive-OR (register-shifted register).
ERET: Exception Return.
ESB: Error Synchronization Barrier.
HLT: Halting Breakpoint.
HVC: Hypervisor Call.
ISB: Instruction Synchronization Barrier.
IT: If-Then.
LDA: Load-Acquire Word.
LDAB: Load-Acquire Byte.
LDAEX: Load-Acquire Exclusive Word.
LDAEXB: Load-Acquire Exclusive Byte.
LDAEXD: Load-Acquire Exclusive Doubleword.
LDAEXH: Load-Acquire Exclusive Halfword.
LDAH: Load-Acquire Halfword.
LDC (immediate): Load data to System register (immediate).
LDC (literal): Load data to System register (literal).
LDM (exception return): Load Multiple (exception return).
LDM (User registers): Load Multiple (User registers).
LDM, LDMIA, LDMFD: Load Multiple (Increment After, Full Descending).
LDMDA, LDMFA: Load Multiple Decrement After (Full Ascending).
LDMDB, LDMEA: Load Multiple Decrement Before (Empty Ascending).
LDMIB, LDMED: Load Multiple Increment Before (Empty Descending).
LDR (immediate): Load Register (immediate).
LDR (literal): Load Register (literal).
LDR (register): Load Register (register).
LDRB (immediate): Load Register Byte (immediate).
LDRB (literal): Load Register Byte (literal).
LDRB (register): Load Register Byte (register).
LDRBT: Load Register Byte Unprivileged.
LDRD (immediate): Load Register Dual (immediate).
LDRD (literal): Load Register Dual (literal).
LDRD (register): Load Register Dual (register).
LDREX: Load Register Exclusive.
LDREXB: Load Register Exclusive Byte.
LDREXD: Load Register Exclusive Doubleword.
LDREXH: Load Register Exclusive Halfword.
LDRH (immediate): Load Register Halfword (immediate).
LDRH (literal): Load Register Halfword (literal).
LDRH (register): Load Register Halfword (register).
LDRHT: Load Register Halfword Unprivileged.
LDRSB (immediate): Load Register Signed Byte (immediate).
LDRSB (literal): Load Register Signed Byte (literal).
LDRSB (register): Load Register Signed Byte (register).
LDRSBT: Load Register Signed Byte Unprivileged.
LDRSH (immediate): Load Register Signed Halfword (immediate).
LDRSH (literal): Load Register Signed Halfword (literal).
LDRSH (register): Load Register Signed Halfword (register).
LDRSHT: Load Register Signed Halfword Unprivileged.
LDRT: Load Register Unprivileged.
LSL (immediate): Logical Shift Left (immediate): an alias of MOV, MOVS (register).
LSL (register): Logical Shift Left (register): an alias of MOV, MOVS (register-shifted register).
LSLS (immediate): Logical Shift Left, setting flags (immediate): an alias of MOV, MOVS (register).
LSLS (register): Logical Shift Left, setting flags (register): an alias of MOV, MOVS (register-shifted register).
LSR (immediate): Logical Shift Right (immediate): an alias of MOV, MOVS (register).
LSR (register): Logical Shift Right (register): an alias of MOV, MOVS (register-shifted register).
LSRS (immediate): Logical Shift Right, setting flags (immediate): an alias of MOV, MOVS (register).
LSRS (register): Logical Shift Right, setting flags (register): an alias of MOV, MOVS (register-shifted register).
MCR: Move to System register from general-purpose register or execute a System instruction.
MCRR: Move to System register from two general-purpose registers.
MLA, MLAS: Multiply Accumulate.
MLS: Multiply and Subtract.
MOV, MOVS (immediate): Move (immediate).
MOV, MOVS (register): Move (register).
MOV, MOVS (register-shifted register): Move (register-shifted register).
MOVT: Move Top.
MRC: Move to general-purpose register from System register.
MRRC: Move to two general-purpose registers from System register.
MRS: Move Special register to general-purpose register.
MRS (Banked register): Move Banked or Special register to general-purpose register.
MSR (Banked register): Move general-purpose register to Banked or Special register.
MSR (immediate): Move immediate value to Special register.
MSR (register): Move general-purpose register to Special register.
MUL, MULS: Multiply.
MVN, MVNS (immediate): Bitwise NOT (immediate).
MVN, MVNS (register): Bitwise NOT (register).
MVN, MVNS (register-shifted register): Bitwise NOT (register-shifted register).
NOP: No Operation.
ORN, ORNS (immediate): Bitwise OR NOT (immediate).
ORN, ORNS (register): Bitwise OR NOT (register).
ORR, ORRS (immediate): Bitwise OR (immediate).
ORR, ORRS (register): Bitwise OR (register).
ORR, ORRS (register-shifted register): Bitwise OR (register-shifted register).
PKHBT, PKHTB: Pack Halfword.
PLD (literal): Preload Data (literal).
PLD, PLDW (immediate): Preload Data (immediate).
PLD, PLDW (register): Preload Data (register).
PLI (immediate, literal): Preload Instruction (immediate, literal).
PLI (register): Preload Instruction (register).
POP: Pop Multiple Registers from Stack.
POP (multiple registers): Pop Multiple Registers from Stack: an alias of LDM, LDMIA, LDMFD.
POP (single register): Pop Single Register from Stack: an alias of LDR (immediate).
PSSBB: Physical Speculative Store Bypass Barrier.
PUSH: Push Multiple Registers to Stack.
PUSH (multiple registers): Push multiple registers to Stack: an alias of STMDB, STMFD.
PUSH (single register): Push Single Register to Stack: an alias of STR (immediate).
QADD: Saturating Add.
QADD16: Saturating Add 16.
QADD8: Saturating Add 8.
QASX: Saturating Add and Subtract with Exchange.
QDADD: Saturating Double and Add.
QDSUB: Saturating Double and Subtract.
QSAX: Saturating Subtract and Add with Exchange.
QSUB: Saturating Subtract.
QSUB16: Saturating Subtract 16.
QSUB8: Saturating Subtract 8.
RBIT: Reverse Bits.
REV: Byte-Reverse Word.
REV16: Byte-Reverse Packed Halfword.
REVSH: Byte-Reverse Signed Halfword.
RFE, RFEDA, RFEDB, RFEIA, RFEIB: Return From Exception.
ROR (immediate): Rotate Right (immediate): an alias of MOV, MOVS (register).
ROR (register): Rotate Right (register): an alias of MOV, MOVS (register-shifted register).
RORS (immediate): Rotate Right, setting flags (immediate): an alias of MOV, MOVS (register).
RORS (register): Rotate Right, setting flags (register): an alias of MOV, MOVS (register-shifted register).
RRX: Rotate Right with Extend: an alias of MOV, MOVS (register).
RRXS: Rotate Right with Extend, setting flags: an alias of MOV, MOVS (register).
RSB, RSBS (immediate): Reverse Subtract (immediate).
RSB, RSBS (register): Reverse Subtract (register).
RSB, RSBS (register-shifted register): Reverse Subtract (register-shifted register).
RSC, RSCS (immediate): Reverse Subtract with Carry (immediate).
RSC, RSCS (register): Reverse Subtract with Carry (register).
RSC, RSCS (register-shifted register): Reverse Subtract (register-shifted register).
SADD16: Signed Add 16.
SADD8: Signed Add 8.
SASX: Signed Add and Subtract with Exchange.
SB: Speculation Barrier.
SBC, SBCS (immediate): Subtract with Carry (immediate).
SBC, SBCS (register): Subtract with Carry (register).
SBC, SBCS (register-shifted register): Subtract with Carry (register-shifted register).
SBFX: Signed Bit Field Extract.
SDIV: Signed Divide.
SEL: Select Bytes.
SETEND: Set Endianness.
SETPAN: Set Privileged Access Never.
SEV: Send Event.
SEVL: Send Event Local.
SHADD16: Signed Halving Add 16.
SHADD8: Signed Halving Add 8.
SHASX: Signed Halving Add and Subtract with Exchange.
SHSAX: Signed Halving Subtract and Add with Exchange.
SHSUB16: Signed Halving Subtract 16.
SHSUB8: Signed Halving Subtract 8.
SMC: Secure Monitor Call.
SMLABB, SMLABT, SMLATB, SMLATT: Signed Multiply Accumulate (halfwords).
SMLAD, SMLADX: Signed Multiply Accumulate Dual.
SMLAL, SMLALS: Signed Multiply Accumulate Long.
SMLALBB, SMLALBT, SMLALTB, SMLALTT: Signed Multiply Accumulate Long (halfwords).
SMLALD, SMLALDX: Signed Multiply Accumulate Long Dual.
SMLAWB, SMLAWT: Signed Multiply Accumulate (word by halfword).
SMLSD, SMLSDX: Signed Multiply Subtract Dual.
SMLSLD, SMLSLDX: Signed Multiply Subtract Long Dual.
SMMLA, SMMLAR: Signed Most Significant Word Multiply Accumulate.
SMMLS, SMMLSR: Signed Most Significant Word Multiply Subtract.
SMMUL, SMMULR: Signed Most Significant Word Multiply.
SMUAD, SMUADX: Signed Dual Multiply Add.
SMULBB, SMULBT, SMULTB, SMULTT: Signed Multiply (halfwords).
SMULL, SMULLS: Signed Multiply Long.
SMULWB, SMULWT: Signed Multiply (word by halfword).
SMUSD, SMUSDX: Signed Multiply Subtract Dual.
SRS, SRSDA, SRSDB, SRSIA, SRSIB: Store Return State.
SSAT: Signed Saturate.
SSAT16: Signed Saturate 16.
SSAX: Signed Subtract and Add with Exchange.
SSBB: Speculative Store Bypass Barrier.
SSUB16: Signed Subtract 16.
SSUB8: Signed Subtract 8.
STC: Store data to System register.
STL: Store-Release Word.
STLB: Store-Release Byte.
STLEX: Store-Release Exclusive Word.
STLEXB: Store-Release Exclusive Byte.
STLEXD: Store-Release Exclusive Doubleword.
STLEXH: Store-Release Exclusive Halfword.
STLH: Store-Release Halfword.
STM (User registers): Store Multiple (User registers).
STM, STMIA, STMEA: Store Multiple (Increment After, Empty Ascending).
STMDA, STMED: Store Multiple Decrement After (Empty Descending).
STMDB, STMFD: Store Multiple Decrement Before (Full Descending).
STMIB, STMFA: Store Multiple Increment Before (Full Ascending).
STR (immediate): Store Register (immediate).
STR (register): Store Register (register).
STRB (immediate): Store Register Byte (immediate).
STRB (register): Store Register Byte (register).
STRBT: Store Register Byte Unprivileged.
STRD (immediate): Store Register Dual (immediate).
STRD (register): Store Register Dual (register).
STREX: Store Register Exclusive.
STREXB: Store Register Exclusive Byte.
STREXD: Store Register Exclusive Doubleword.
STREXH: Store Register Exclusive Halfword.
STRH (immediate): Store Register Halfword (immediate).
STRH (register): Store Register Halfword (register).
STRHT: Store Register Halfword Unprivileged.
STRT: Store Register Unprivileged.
SUB (immediate, from PC): Subtract from PC: an alias of ADR.
SUB, SUBS (immediate): Subtract (immediate).
SUB, SUBS (register): Subtract (register).
SUB, SUBS (register-shifted register): Subtract (register-shifted register).
SUB, SUBS (SP minus immediate): Subtract from SP (immediate).
SUB, SUBS (SP minus register): Subtract from SP (register).
SVC: Supervisor Call.
SXTAB: Signed Extend and Add Byte.
SXTAB16: Signed Extend and Add Byte 16.
SXTAH: Signed Extend and Add Halfword.
SXTB: Signed Extend Byte.
SXTB16: Signed Extend Byte 16.
SXTH: Signed Extend Halfword.
TBB, TBH: Table Branch Byte or Halfword.
TEQ (immediate): Test Equivalence (immediate).
TEQ (register): Test Equivalence (register).
TEQ (register-shifted register): Test Equivalence (register-shifted register).
TSB: Trace Synchronization Barrier.
TST (immediate): Test (immediate).
TST (register): Test (register).
TST (register-shifted register): Test (register-shifted register).
UADD16: Unsigned Add 16.
UADD8: Unsigned Add 8.
UASX: Unsigned Add and Subtract with Exchange.
UBFX: Unsigned Bit Field Extract.
UDF: Permanently Undefined.
UDIV: Unsigned Divide.
UHADD16: Unsigned Halving Add 16.
UHADD8: Unsigned Halving Add 8.
UHASX: Unsigned Halving Add and Subtract with Exchange.
UHSAX: Unsigned Halving Subtract and Add with Exchange.
UHSUB16: Unsigned Halving Subtract 16.
UHSUB8: Unsigned Halving Subtract 8.
UMAAL: Unsigned Multiply Accumulate Accumulate Long.
UMLAL, UMLALS: Unsigned Multiply Accumulate Long.
UMULL, UMULLS: Unsigned Multiply Long.
UQADD16: Unsigned Saturating Add 16.
UQADD8: Unsigned Saturating Add 8.
UQASX: Unsigned Saturating Add and Subtract with Exchange.
UQSAX: Unsigned Saturating Subtract and Add with Exchange.
UQSUB16: Unsigned Saturating Subtract 16.
UQSUB8: Unsigned Saturating Subtract 8.
USAD8: Unsigned Sum of Absolute Differences.
USADA8: Unsigned Sum of Absolute Differences and Accumulate.
USAT: Unsigned Saturate.
USAT16: Unsigned Saturate 16.
USAX: Unsigned Subtract and Add with Exchange.
USUB16: Unsigned Subtract 16.
USUB8: Unsigned Subtract 8.
UXTAB: Unsigned Extend and Add Byte.
UXTAB16: Unsigned Extend and Add Byte 16.
UXTAH: Unsigned Extend and Add Halfword.
UXTB: Unsigned Extend Byte.
UXTB16: Unsigned Extend Byte 16.
UXTH: Unsigned Extend Halfword.
WFE: Wait For Event.
WFI: Wait For Interrupt.
YIELD: Yield hint.
Internal version only: isa v01_31, pseudocode v2024-03_rel ; Build timestamp: 2024-03-25T10:05
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